Many of today's most popular electronics applications, such as personal computers and mobile phones, are migrating to lower operating voltages. This leaves less tolerance for errors and increases the accuracy requirements for components. This is especially true for amplifiers used in these applications. At the same time, volume for these products continues to grow, putting additional pressure on suppliers to reduce component costs.
One key amplifier parameter for system accuracy is input offset voltage. Various trimming techniques have been used to adjust amplifier offset voltage and other parameters. Indeed, trimming techniques have enabled an entire class of precision amplifiers to exist today. However, offset trimming and the improved accuracy it creates has not, for the most part, found its way into the high volume, low-cost CMOS amplifiers and A-to-D and D-to-A converters.
Some trimming techniques rely upon an exposed thin film resistor that is trimmed with a laser. Other techniques rely upon polysilicon resistors with thinned central portions that are exposed and cut with a laser.
Still other trimming techniques rely upon resistors that are selectively added or dropped from an integrated circuit by operating a fuse that is in series with the resistor. Such fuses are themselves polysilicon resistors. They have several advantages. For example, they have the ability to be blown without opening the packaged integrated circuit. In contrast to metal fuses which must have an opening to allow gases to escape, the polysilicon fuses do not. Polysilicon fuses can thus be used for trimming during wafer sort, final test, and in customer applications.
Typically polysilicon resistor fuses have a layer of silicide over the fuse to form a low resistance conductor for the current densities required to generate heat that creates a discontinuity in the polysilicon and in the silicide. However, the fuse must be designed, and the proper fuse current must be used, to prevent the silicide flows from reforming the electrical connection across the fuse after it has been initially blown.
For example, a conventional fuse is doped N+ during the N+ poly and N+ source/drain implants. Next, a silicide layer is deposited on the ends of the fuse to provide the resistive difference needed to blow the fuse. In one example the conventional fuse is a layer of polysilicon about 27 μm thick and has a resistivity of 21.44 Ohms/sq in the central region and a resistivity of 35.95 Ohms/sq on the outer ends. The N+ polysilicon body of the fuse is from with an N+ gate implant using a phosphorus species in the order of 1E16/cm2 and an N+ source/drain implant with an arsenic species on the order of 5.7E14/cm2. In another conventional example, where the poly thickness is also 27 um, the N+ gate implant is also phosphorus species on the order of 1E16/cm2 and the N+ source/drain is also an arsenic species on the order of 6.5E14cm2. This example provided a resistivity of 28.74 Ohms/sq in the central region and 6.2 Ohms/sq on the outer regions. That is almost a 5× factor and that is sufficient to easily blow such fuses. In a further conventional example, the polysilicon body was 34 um thick. It used an arsenic implant of approximately 1.08E16/cm2 for the N+ gate implant, and an arsenic implant of 2E15/cm2 for the N+ source/drain implant. It had a resistivity of 102 Ohms/sq in the central region and a 7.8 Ohms/sq on the outer edges providing a 13× resistance factor. These fuses blow easily.
Some prior art fuses are often difficult to blow because the silicide and unsilicided regions had similar resistivities. In the first example above, silicide provides only about a 1.6× difference in resistance between the ends the middle of the fuse. Based on the results of these examples, it is clear that the dopant concentration in the central region is not the only factor affecting the performance of the fuse. Other factors include and are not limited to the ratio of resistivity from outer edges to central region. Initial experience indicates that a ratio of 1:7 in resistivity between the outer edges (terminals) and the central body yields fuses that blow relatively easily.
Such silicide dependent polysilicon fuses have other drawbacks. First of all, one has to have a process that uses silicide or modify an existing process to add silicide. In order to form a silicide, the temperature of the device is likely heated to very high temperatures. That extra heat may alter the internal characteristics of the device by expanding small diffusion regions beyond their designed boundaries. Second, there is the possibility that, after the fuse is blown, the silicide will reform and thereby defeat the fuse. As such, it would be an advantage to have a polysilicon fuse compatible with a low heat budget CMOS process that does not require a silicide step.